Dear Readers

Please feel free to add any more information/comments which would help to make this attempt better

-Happy Reading
Hash


We can hearing about Virtual sequencer , what is the difference between the normal sequencer and the virtual sequencer?

 The difference between the normal & Virtual sequencer are  the sequence items apart from the Virtual keyword.
Virtual Sequencer  does not have its own sequence items , it just coordinates different sequencers and their sequences 

2)I was also asked why we need the create factory method when we already have new ()
  Am trying to find answer for this and would publish it once have more information

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•  Factory is a OOPS coding pattern 
• Create() is a factory method which construct an object. 
• To override an object you need to construct it using create().
•  if you use set_type_override then before run ,factory replaces constructed object with derived object( specified in override). 
• If we use the  new() then you cant override the object.

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3)In which UVM phases does the T/B components are created?


All the T/B components are compiled  initially ,but objects get created or newed during the build phase

Dear Readers


In UVM  we keep hearing these terms sequences/sequencer /transaction . lets try to understand these terms as below

-Happy Reading
Hash



Sequencer 

is a stimulus generator which returns random data item when requested by driver.
Sequencer  controls the flow of  sequences from sequencer to the driver

Using sequence we can add constraints to generate controlled randomized values of stimulus..
Transaction is the input to the DUT from driver component and transaction  is a set of sequences



Sequence {provides control on distribution of randomized values} ----> sequencer --(generates randomized stimulus when requested by Driver)----> transaction sent to DUT

 Sequences consist of randomized values of transactions i.e data items or sequence items
 Thus generated  sequences will be sent by the sequencer to the driver upon  request.
 Ultimately these transactions or data items, will be passed on to the DUT after the driver finishes its execution upon transactions.

The Sequences would be executed during the run phase

Sequence has the task_body() where as  the sequencer dont have it !
This is one of the many interview questions which i was asked on UVM.

Who Am I

Iam one among the many Verification Engineers based out of India


As there is enough material on ASIC flows /Testbenches /Scripting  on the web, I would like to share few things on the evolving Verification methodology as UVM from my  methodology experience/training sessions i attended !

As Iam also learning UVM ,  like to learn /explore more things by interacting with other  guys , so feel free to post your comments .  All the material posted here is to give a novice a basic idea about the methodology .  Would like to add more references /examples/books/Q&A  which can be of some help to everyone


Am reading a lot of blogs and thought would have one for myself!

This blog would contain more information on building test benches & on UVM!
 During the course of time, I look forward to organise the content in a much better way


-Hash